fpga/flash/obj_dir/Vtop___024root__Slow.cpp
2026-02-03 14:26:16 +01:00

35 lines
945 B
C++

// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vtop.h for the primary calling header
#include "Vtop__pch.h"
#include "Vtop__Syms.h"
#include "Vtop___024root.h"
void Vtop___024root___ctor_var_reset(Vtop___024root* vlSelf);
Vtop___024root::Vtop___024root(Vtop__Syms* symsp, const char* v__name)
: VerilatedModule{v__name}
, __Vm_mtaskstate_7(2U)
, __Vm_mtaskstate_18(2U)
, __Vm_mtaskstate_11(1U)
, __Vm_mtaskstate_12(1U)
, __Vm_mtaskstate_9(1U)
, __Vm_mtaskstate_10(1U)
, __Vm_mtaskstate_19(1U)
, __Vm_mtaskstate_8(1U)
, __Vm_mtaskstate_20(1U)
, __Vm_mtaskstate_25(1U)
, __Vm_mtaskstate_final__0nba(7U)
, vlSymsp{symsp}
{
// Reset structure values
Vtop___024root___ctor_var_reset(this);
}
void Vtop___024root::__Vconfigure(bool first) {
(void)first; // Prevent unused variable warning
}
Vtop___024root::~Vtop___024root() {
}